Research Staff Courses Data Converters News
Edoardo Bonizzoni, Ph.D.


 


 

 

 

 

 


         

Edoardo Bonizzoni was born in Pavia, Italy, in 1977. He received the Laurea degree (summa cum laude) in Electronic Engineering from the University of Pavia, Italy, in 2002. From the same University, he received in 2006 the Ph.D. degree in Electronic, Computer, and Electrical engineering.

In 2002 he joined the Integrated Microsystems Laboratory of the University of Pavia as a Ph.D. candidate. During his Ph.D., he worked on development, design and testing of non-volatile memories with particular regard to phase-change memories. From 2006 his research interests are mainly focused on the design and testing of DC-DC and A/D converters. In this period he worked on single-inductor multiple-output DC-DC buck regulator solutions and on both Nyquist-rate and oversampled A/D converters. Recently, his research focuses on the design of high precision amplifiers and ultra-low voltage voltage reference circuits as well.

Presently, he is a Senior Assistant Professor at the Department of Electrical, Computer, and Biomedical Engineering of the University of Pavia.

Dr. Bonizzoni is co-recipient of the IEEE International Symposium on Circuits and Systems (ISCAS) 2014 Honorary Mention Paper Award of the Sensory Systems Track, of the IEEE/IEEJ Analog VLSI Workshop (AVLSIWS) 2010 best paper award, of the IEEE European Solid-State Circuits Conference (ESSCIRC) 2007 best paper award and of the IEEE/IEEJ Analog VLSI Workshop (AVLSIWS) 2007 best paper award.

From 2011 to 2015 he served the IEEE Circuits and Systems Society as an Associate Editor of the IEEE Transactions on Circuits and Systems - Part. II and, since 2016, he is an Associate Editor of the IEEE Transactions on Circuits and Systems - Part. I. Dr. Bonizzoni has been nominated Best TCAS-II Associate Editors for the 2012-2013 term. Since 2013 he is a TPC member of the IEEE Conference on Ph.D. Research in Microelectronics and Electronics (PRIME). He is an IEEE member since 2006.


Pubblications

Book Chapters

* E. Bonizzoni, Y. Liu, and F. Maloberti, “Smart-DEM for energy-efficient incremental ADCs"; Book chapter of "Efficient Sensor Interfaces, Advanced Amplifiers and Low Power RF Systems", edited by K. Makinwa, A. Baschirotto, and P. Harpe, Springer 2015, pp. 3-22, ISBN 978-3-319-21184-8.
* M. Belloni, E. Bonizzoni, and F. Maloberti, “Single-Inductor Multiple-Output DC-DC Converters"; Book chapter of "Analog Circuit Design, High Speed Clock and Data Recovery, High Performance Amplifiers and Power Management", edited by M. Steyaert, A.H.M. Van Roermund, and H. Casier, Springer Science+Businness Media 2008, pp. 233-253, ISBN 978-1-4020-8943-5.

Thesis

* E. Bonizzoni, “Phase-change memories”, Ph.D. Thesis, University of Pavia, 2006.
* E. Bonizzoni, “Model and algorithm for design of maximum-efficiency Dickson charge pumps”, Laurea Degree Thesis, University of Pavia, 2002.

Journal Papers

* W. Germanovix, E. Bonizzoni, and F. Maloberti, "Capacitance Super Multiplier for Sub-Hertz Low-Pass Integrated Filters", to appear in IEEE Transactions on Circuits and Systems II: Express Briefs, 2017.
* D.G. Muratore, E. Bonizzoni, S. Verri, and F. Maloberti "High-Resolution Time-Interleaved 8-Channel ADC for Li-Ion Battery Stack", IEEE Transactions on Circuits and Systems II: Express Briefs, 10.1109/TCSII.2016.2597358, 2016.
* H. Heidari, E. Bonizzoni, U. Gatti, F. Maloberti, and R. Dahiya, "CMOS Vertical Hall Magnetic Sensors on Flexible Substrate", IEEE Sensors Journal, vol. 16, issue 24, pp. 8736-8743, 2016.
* P.B. Basyurt, E. Bonizzoni, D. Aksin, and F. Maloberti, "A 0.4-V Supply Curvature Corrected Reference Generator with 84.5 ppm/°C Average Temperature Coefficient within -40 to 130°C", IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 64, issue 4, 2017.
* Y. Zhang, E. Bonizzoni, and F. Maloberti, "An energy-efficient switching method for SAR ADCs with bottom plate sampling", IET Electronics Letters, Vol. 52, Issue: 9, pp. 690-692, 2016.
* Y. Zhang, E. Bonizzoni, and F. Maloberti, "A 10-bit, 200-kS/s, 250-nA Self-Clocked Coarse-Fine SAR ADC", IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 63, issue 10, pp. 924-928, 2016.
* P.B. Basyurt, E. Bonizzoni, D.Y. Aksin, and F. Maloberti, "Voltage Reference Architectures for Low-Supply-Voltage Low-Power Applications", Microelectronics Journal, Vol. 46, Nr. 11, 2015.
* H. Heidari, E. Bonizzoni, U. Gatti, and F. Maloberti, "A CMOS Current-Mode Magnetic Hall Sensor with Integrated Front-End", IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 62, Issue: 5, pp. 1270-1278, May 2015.
* N. Kumar Y.B., E. Bonizzoni, A. Patra, and F. Maloberti, "Interference Rejection in Quadrature Band-Pass Sigma-Delta Modulators", Analog Integrated Circuits and Signal Processing, DOI 10.1007/s10470-015-0511-5, vol. 83, pp. 95-101, 2015.
* Y. Liu, E. Bonizzoni, A. D'Amato, and F. Maloberti, "A High-Resolution Low-Power and Multi-Bit Incremental Converter with Smart-DEM", Analog Integrated Circuits and Signal Processing, DOI 10.1007/s10470-015-0492-4, vol. 82, pp. 663-674, 2015.
* A. Pena Perez, E. Bonizzoni, and F. Maloberti, "A 88 dB DR, 84 dB SNDR Very Low-Power Single Op-Amp Third-Order Sigma-Delta Modulator", IEEE Journal of Solid-State Circuits, vol. 47, pp. 2107-2118, Sept. 2012.
* O.Belotti, E. Bonizzoni, and F. Maloberti, "Exact Design of Continuous-Time Sigma-Delta Modulators with Multiple Feedback DACs", Analog Integrated Circuits and Signal Processing, DOI 10.1007/s10470-012-9866-z, vol. 73, pp. 255-264, 2012.
* N. Kumar Y.B., E. Bonizzoni, A. Patra, and F. Maloberti, "Two-path double delay line based band-pass quadrature sigma-delta modulator," IET Electronics Letters, vol. 47, pp. 1316–1317, Nov. 2011.
* H. Caracciolo,E. Bonizzoni, P. Malcovati, and F. Maloberti, "70-MHz IF 10-MHz bandwidth bandpass sigma-delta modulator for WCDMA applications," Analog Integrated Circuits and Signal Processing, On Line First October 2011, DOI 10.1007/s10470-011-9795-2, vol. 71, no. 3, pp. 411-419, June 2012.
* A. Agnes, E. Bonizzoni, and F. Maloberti, "High-resolution multi-bit second-order incremental converter with 1.5-uV residual offset and 94-dB SFDR," Analog Integrated Circuits and Signal Processing, On line first, DOI 10.1007/s10470-011-9752-0, vol. 72, pp. 531-539, Sept. 2012..
* M. Belloni, E. Bonizzoni, A. Fornasari, and F. Maloberti, “A Micropower Chopper-CDS Operational Amplifier”, IEEE Journal of Solid-State Circuits, vol. 45, n. 12, pp. 2521-2529, Dec. 2010.
* E. Bonizzoni, A. Pena Perez, F. Maloberti, and M.A. Garcia-Andrade, “Two Op-Amps Third-Order Sigma-Delta Modulator with 61-dB SNDR, 6-MHz Bandwidth and 6-mW Power Consumption”, Analog Integrated Circuits and Signal Processing, DOI: 10.1007/s10470-010-9538-9, vol. 66, pp. 381-388, 2011.
* A. Agnes, E. Bonizzoni, P. Malcovati, and F. Maloberti, "An Ultra-Low Power Successive Approximation A/D Converter with Time-Domain Comparator", Analog Integrated Circuits and Signal Processing, vol. 64, pp. 183-190, August 2010.
* M. Belloni, E. Bonizzoni, P. Malcovati, and F. Maloberti, " A High Efficiency 4-Output Single Inductor DC-DC Buck Converter with Self Boosted Snubber ", Analog Integrated Circuits and Signal Processing, DOI: 10.1007/s10470-010-9570-9, vol. 67, pp. 169-177, 2011.
* E. Bonizzoni, F. Borghetti, P. Malcovati, and F. Maloberti, “A 200-mA, 93% Peak Power Efficiency, Single-Inductor, Dual-Output DC-DC Buck Converter”, Analog Integrated Circuits and Signal Processing, vol. 62, no. 2, pp. 121-129.
* I. Galdi, E. Bonizzoni, P. Malcovati, G. Manganaro, and F. Maloberti, “40-MHz IF 1-MHz Bandwidth Two-Path Band-Pass ?? Modulator with 72-dB DR Consuming 16 mW”, IEEE Journal of Solid-State Circuits, vol. 43, no. 7, pp. 1648-1656, July 2008.
* F. Bedeschi, C. Boffino, E. Bonizzoni, C. Resta, and G. Torelli, “Staircase Down SET Programming Approach for Phase-Change Memories”, ELSEVIR Microelectronics Journal, 38, pp. 1064-1069, 2007.
* F. Bedeschi, R. Bez, C. Boffino, E. Bonizzoni, E. Buda, G. Casagrande, L. Costa, M. Ferraro, R.Gastaldi, O. Khouri, F. Ottogalli, F. Pellizzer, A. Pirovano, C. Resta, G. Torelli, and M. Tosi, “4 Mbit MOSFET-selected µtrench phase-change memory experimental chip”, IEEE Journal of Solid-State Circuits, vol. 40, no. 7, pp. 1557-1565, July 2005.

Conference Papers

* P.B. Basyurt, E. Bonizzoni, F. Maloberti, and D.Y. Aksin, "A low-power low-noise CMOS voltage reference with improved PSR for wearable sensor systems", to appear in Proc. of IEEE International Symposium on Circuits and Systems (ISCAS), May 2017.
* A. Salimath, G. Gonano, E. Bonizzoni, D.L. Brambilla, E. Botti, and F. Maloberti, "A high-speed level shifting technique and its application in high-voltage, synchronous DC-DC converters with quasi-ZVS", to appear in Proc. of IEEE International Symposium on Circuits and Systems (ISCAS), May 2017.
* P.B. Basyurt, E. Bonizzoni, F. Maloberti, and D.Y. Aksin, "Design of a compact and low supply voltage CMOS voltage reference generator", Proc. of IEEE International Conference on Electronics, Circuits and Systems (ICECS), pp. 740-743, Dec. 2016.
* Y. Zhang, E. Bonizzoni, and F. Maloberti, "Mismatch and parasitics limits in capacitors-based SAR ADCs", Proc. of IEEE International Conference on Electronics, Circuits and Systems (ICECS), pp. 33-36, Dec. 2016.
* D.G. Muratore, A. Akdikmen, E. Bonizzoni, F. Maloberti, U.-F. Chio, S.-W. Sin, R.P. Martins, "An 8-Bit 0.7-Gs/S Single Channel Flash-SAR ADC in 65-nm CMOS Technology", Proc. of IEEE European Solid-State Circuits Conference (ESSCIRC), pp. 421-424, Sept. 2016.
* A. Salimath, E. Bonizzoni, and F. Maloberti, "A Mode-of-Operation Based Switching Technique for SIDO Buck-Boost Converter", Proc. of IEEE Conference on Ph.D. Research in Microelectronics and Electronics (PRIME), pp. 1-4, 2016.
* D.G. Muratore, E. Bonizzoni, and F. Maloberti, "A Pipeline ADC for Very High Conversion Rates", Proc. of IEEE International Symposium on Circuits and Systems (ISCAS), pp. 1446-1449, May 2016.
* D.G. Muratore, E. Bonizzoni, F. Maloberti, C. Fiocchi, "A Capacitive Sensor Interface for High-Resolution Acquisitions in Hostile Environments", Proc. of IEEE Latin American Symposium on Circuits and Systems (LASCAS), pp. 167-170, Feb. 2016.
* F. Maloberti, E. Bonizzoni, P.B. Basyurt, "Very-Low-Voltage and Ultra-Low-Power Analog Circuits for Nomadic Applications", Proc. of IEEE Latin American Symposium on Circuits and Systems (LASCAS), pp. 403-410, Feb. 2016.
* H. Heidari, E. Bonizzoni, U. Gatti, F. Maloberti, R. Dahiya, "Optimal Geometry of CMOS Voltage-Mode and Current-Mode Vertical Magnetic Hall Sensor", Proc. of IEEE Sensors, pp. 1-4, Nov. 2015.
* P.B. Basyurt, E. Bonizzoni, D.Y. Aksin, F. Maloberti, "Design of an op-amp free voltage reference with PWM regulation", Proc. of IEEE European Conference on Circuit Theory and Design (ECCTD), pp. 1-4, Aug. 2015.
* D.G. Muratore, E. Bonizzoni, and F. Maloberti, "A Split Transconductor High-Speed SAR ADC", Proc. of IEEE International Symposium on Circuits and Systems (ISCAS), pp. 2433-2436, May 2015.
* Y. Liu, E. Bonizzoni, and F. Maloberti, "A Single Op-Amp 0+2 Sigma-Delta Modulator", Proc. of IEEE International Symposium on Circuits and Systems (ISCAS), pp. 2029-2032, May 2015.
* A. Demarziani, E. Bonizzoni, F. Maloberti, and A. D'Amato, "Design of a Low Power Time to Digital Converter for Flow Metering Applications", Proc. of IEEE International Symposium on Circuits and Systems (ISCAS), pp. 1646-1649, May 2015.
* H. Heidari, E. Bonizzoni, U. Gatti, F. Maloberti, "A 0.18-um CMOS Current-Mode Hall Magnetic Sensor with Very Low Bias Current and High Sensitive Front-End", Proc. of IEEE Sensors, pp. 1467-1470, Nov. 2014.
* P.B. Basyurt, D.Y. Aksin, E. Bonizzoni, F. Maloberti, "A 490-nA, 43-ppm/°C, Sub-0.8-V Supply Voltage Reference", Proc. of IEEE European Solid-State Circuits Conference (ESSCIRC), pp. 115-118, Sept. 2014.
* D. Feng, S.-W. Sin, E. Bonizzoni, F. Maloberti, "Time Interleaved Current Steering DAC for Ultra-High Conversion Rate", Proc. of IEEE Conference on Ph.D. Research in Microelectronics and Electronics (PRIME), June 2014.
* H. Heidari, E. Bonizzoni, U. Gatti, F. Maloberti, "Analysis and Modeling of Four-Folded Vertical Hall Devices in Current Domain", Proc. of IEEE Conference on Ph.D. Research in Microelectronics and Electronics (PRIME), June 2014.
* P.B. Basyurt, D.Y. Aksin, E. Bonizzoni, F. Maloberti, "Sampled-Data Operational Amplifier with Ultra-Low Supply Voltage and Sub uW Power Consumption, Proc. of IEEE International Symposium on Circuits and Systems (ISCAS), pp. 1893-1896, May 2014.
* Y. Liu, E. Bonizzoni, F. Maloberti, "A 2+1 Multi-Bit Incremental Architecture Using Smart-DEM Algorithm", Proc. of IEEE International Symposium on Circuits and Systems (ISCAS), pp. 1668-1671, May 2014.
* H. Heidari, E. Bonizzoni, U. Gatti, F. Maloberti, "A Current-Mode CMOS Integrated Microsystem for Current Spinning Magnetic Hall Sensors", Proc. of IEEE International Symposium on Circuits and Systems (ISCAS), pp. 678-681, May 2014. (Honorary Mention Paper Award)
* Y. Liu, E. Bonizzoni, A. D'Amato, and F. Maloberti, "A 105-dB SNDR, 10 kSps Multi-Level Second-Order Incremental Converter with Smart-DEM Consuming 280 uW and 3.3-V Supply", Proc. of IEEE European Solid-State Circuits Conference (ESSCIRC), pp. 371-374, Sept. 2013.
* H. Heidari, U. Gatti, E. Bonizzoni, and F. Maloberti, "Low-Noise Low-Offset Current-Mode Hall Sensor", Proc. of IEEE Conference on Ph.D. Research in Microelectronics and Electronics (PRIME), pp. 325-328, June 2013.
* O. Belotti, E. Bonizzoni, F. Maloberti, "Design of a Third-Order ?? Modulator with Minimum Op-Amps Output Swing", Proc. of IEEE International Symposium on Circuits and Systems (ISCAS), pp. 821-824, May 2013.
* Y. Liu, E. Bonizzoni, F. Maloberti, "High-Order Multi-Bit Incremental Converter with Smart-DEM Algorithm", Proc. of IEEE International Symposium on Circuits and Systems (ISCAS), pp. 157-160, May 2013.
* Y.B. Nithin Kumar, H. Caracciolo, E. Bonizzoni, A. Patra, F. Maloberti, "A 1.96-mW, 2.6-MHz Bandwidth Discrete Time Quadrature Band-Pass ?? Modulator", Proc. of IEEE International Symposium on Circuits and Systems (ISCAS), pp. 1998-2001, May 2013.
* Y.B. Nithin Kumar, E. Bonizzoni, A. Patra, F. Maloberti, "Two-Path Quadrature Cascaded Band-Pass Sigma-Delta Modulators", 26th International Conference on VLSI Design, VLSI Design 2013, pp. 221-226, Jan. 2013.
* E. Bonizzoni, A. Pena Perez, H. Caracciolo, D. Stoppa, and F. Maloberti, "An Incremental ADC Sensor Interface with Input Switch-Less Integrator Featuring 220-nVrms Resolution with +/-30mV Input Range", Proc. of IEEE European Solid-State Circuits Conference (ESSCIRC), pp. 389-392, Sept. 2012.
* N. Kumar Y.B., E. Bonizzoni, A. Patra, and F. Maloberti, "Interference Rejection in Delay Line Based Quadrature Band-Pass ?? Modulators", Proc. of IEEE International Symposium on Circuits and Systems (ISCAS), pp. 3005-3008, May 2012.
* O. Belotti, E. Bonizzoni, and F. Maloberti, "A 1-V 1.1-MHz BW Digitally Assisted Multi-Bit Multi-Rate Hybrid CT ?? with 78-dB SFDR", Proc. of IEEE International Symposium on Circuits and Systems (ISCAS), pp. 289-292, May 2012.
* N. Kumar Y.B., E. Bonizzoni, A. Patra, and F. Maloberti, "Two-path delay line based quadrature band- pass ?? modulator", Proceedings of IEEE/IEEJ Analog VLSI Workshop (AWVLSI), pp. 65–69, Nov. 2011.
* Y. Liu, E. Bonizzoni, and F. Maloberti, "Digital assisted high-order multi-bit analog to digital ramp converters," Proceedings of IEEE European Conference on Circuit Theory and Design (ECCTD), pp. 593–596, Aug. 2011.
* O. Belotti, E. Bonizzoni, and F. Maloberti, "Mono-rate and multi-rate hybrid continuous-time ??
modulators with SC feedback DAC," Proceedings of IEEE International Symposium on Signals, Circuits
and Systems (ISSCS)
, June 2011.
* A. Pena Perez, E. Bonizzoni, and F.Maloberti, “A Low-Power Third-Order Sigma-Delta Modulator Using a Single Operational Amplifier”, Proc. of IEEE International Symposium on Circuit and Systems (ISCAS), pp. 1371-1374, May 2011.
* A. Pena Perez, E. Bonizzoni, and F.Maloberti, “A 84dB SNDR 100kHz Bandwidth Low-Power Single Op-Amp Third-Order Sigma-Delta Modulator Consuming 140µW”, IEEE International Solid-State Circuits Conference (ISSCC) Dig. Tech. Papers, 477-478, Feb. 2011.
* V.R. Gonzalez-Diaz, E. Bonizzoni, and F.Maloberti, “Pseudorandom Sequence Generation for Mismatch Analog Compensation of ADCs”, Proc. of IEEE International Conference on Electronics, Circuits, and Systems (ICECS), pp. 118-121, Dec. 2010.
* A. Pena Perez, O. Belotti, E. Bonizzoni, and F.Maloberti, “A Two Op-Amps Third-Order ?? Modulator with Complex Conjugate NTF Zeros”, Proc. of IEEE International Conference on Electronics, Circuits, and Systems (ICECS), pp. 689-692, Dec. 2010.
* A. Agnes, E. Bonizzoni, A. D'Amato, I. Galdi, F. Maloberti, "High-Resolution Multi-Bit Incremental Converter with 1.5-µV Residual Offset and 94-dB SFDR", Proc. of IEEE/IEEJ International Analog VLSI Workshop (AVLSIWS), pp. 103-106, Sept. 2010. (Best paper award)
* M. Belloni, E. Bonizzoni, F. Maloberti, A. Fornasari: "Low-Power Ripple-Free Chopper Amplifier with Correlated Double Sampling De-Chopping", Proc. of IEEE International Symposium on Circuits and Systems (ISCAS), pp. 765-768, May 2010.
* H. Caracciolo, E. Bonizzoni, P. Malcovati, F. Maloberti: "Design of a 70-MHz IF 10-MHz Bandwidth Bandpass ?? Modulator for WCDMA Applications", Proc. of IEEE International Symposium on Circuits and Systems (ISCAS), pp. 2406-2409, May 2010.
* H. Caracciolo, E. Bonizzoni, F. Maloberti, G.S. La Rue: "Digitally Assisted Multi-Bit ?? Modulator", Proc. of IEEE International Symposium on Circuits and Systems (ISCAS), pp. 3993-3996, May 2010.
* M. Belloni, E. Bonizzoni, A. Fornasari, and F. Maloberti, “A Micropower Chopper-Correlated Double-Sampling Amplifier with 2µV Standard Deviation Offset and 37nV/sqrt(Hz) Input Noise Density”, IEEE International Solid-State Circuits Conference (ISSCC) Dig. Tech. Papers, pp. 76-77, Feb. 2010.
* F. Maloberti, E. Bonizzoni, and A. Surano, “Time Variant Digital Sigma-Delta Modulator for Fractional-N Frequency Synthesizers”, Proc. of IEEE Radio-Frequency Integration Technology (RFIT), pp. 111-114, Dec. 2009.
* M. Belloni, E. Bonizzoni, and F. Maloberti, “High Efficiency DC-DC Buck Converter with 60/120-MHz Switching Frequency and 1-A Output Current”, Proc. of IEEE European Solid-State Circuits Conference (ESSCIRC), pp. 452-455, Sept. 2009.
* S. Noli, A. Perez, E. Bonizzoni, and F. Maloberti, “Sigma-Delta Time Interleaved Current Steering DAC with Dynamic Elemnts Matching”, Proc. of IEEE Midwest Symposium on Circuits and Systems (MWSCAS), pp. 407-410, Aug. 2009.
* A. Surano, E. Bonizzoni, and F. Maloberti, “On-Chip Sine Wave Frequency Multiplier for 40-GHz Signal Generator”, Proc. of IEEE Ph.D. Research in Microelectronics and Electronics (PRIME), pp. 284-287, July 2009.
* A. Perez, N. Kumar Y.B., E. Bonizzoni, and F. Maloberti, “Slew-Rate and Gain Enhancement in Two-Stage Operational Amplifiers”, Proc. of International Symposium on Circuit and Systems (ISCAS), pp. 2485-2488, May 2009.
* E. Bonizzoni, A. Perez, F. Maloberti, and M. Garcia-Andrade, “Third-Order ?? Modulator with 61-dB SNR and 6-MHz Bandwidth Consuming 6 mW”, Proc. of IEEE European Solid-State Circuits Conference (ESSCIRC, pp. 218-221, Sept. 2008.
* E. Bonizzoni, A. Perez, and F. Maloberti, “Non-Conventional ?? Architectures for Very Low-Power and Medium Resolution Applications”, Proc. of IEEE/IEEJ International Analog VLSI Workshop (AVLSIWS), pp. 135-139, July 2008.
* M. Belloni, E. Bonizzoni, and F. Maloberti, “On the Design of Single-Inductor Double-Output DC-DC Buck, Boost, Buck-Boost Converters”, Proc. of IEEE International Conference on Electronics, Circuits and Systems (ICECS), pp. 626-629, Sept. 2008.
* F. Erario, A. Agnes, E. Bonizzoni, and F. Maloberti, “Design of an Ultra-Low Power Time Interleaved SAR Converter”, Proc. of IEEE Ph.D. Research in Microelectronics and Electronics (PRIME), pp. 245-248, June 2008.
* M. Belloni, E. Bonizzoni, and F. Maloberti, “A Voltage-to-Pulse Converter for Very High Frequency DC-DC Converters”, Proc. of IEEE International Symposium on Power Electronics, Electrical Drives, Automation and Motion (SPEEDAM), pp. 789-791, June 2008.
* M. Belloni, E. Bonizzoni, and F. Maloberti, “On the Design of Single-Inductor Multiple-Output DC-DC Buck Converters”, Proc. of International Symposium on Circuit and Systems (ISCAS), pp. 3049-3052, May 2008.
* A. Agnes, E. Bonizzoni, and F. Maloberti, “Design of an Ultra-Low Power SA-ADC with Medium/High Resolution and Speed”, Proc. of International Symposium on Circuit and Systems (ISCAS), pp. 1-4, May 2008.
* H. Caracciolo, I. Galdi, E. Bonizzoni, and F. Maloberti, “Band-Pass Sigma-Delta Architectures with Single and Two Parallel Paths”, Proc. of International Symposium on Circuit and Systems (ISCAS), pp. 1656-1659, May 2008.
* M. Belloni, E. Bonizzoni, E. Kiseliovas, P. Malcovati, F. Maloberti, T. Peltola, and T. Teppo, “A 1.2A Output Current Single-Inductor 4-Output DC-DC Buck Converter with Self-Boosted Switch Drivers”, IEEE International Solid-State Circuits Conference (ISSCC) Dig. Tech. Papers, pp. 444-626, Feb. 2008.
* A. Agnes, E. Bonizzoni, P. Malcovati, and F. Maloberti, “A 9.4 ENoB, 1V, 3.8mW, 100 kS/s SAR-ADC with Time-Domain Comparator”, IEEE International Solid-State Circuits Conference (ISSCC) Dig. Tech. Papers, pp. 246-610, Feb. 2008.
* H. Caracciolo, E. Bonizzoni, and F. Maloberti, “Quasi-Second Order ?? Modulator Based on Phase-Integration”, Proc. of IEEE/IEEJ International Analog VLSI Workshop (AVLSIWS), pp. 19-22, Nov. 2007. (Best paper award)
* I. Galdi, E. Bonizzoni, F. Maloberti, G. Manganaro, and P. Malcovati, “Two-path band-pass ?? modulator with 40-MHz IF 72-dB DR at 1-MHz bandwidth consuming 16 mW”, Proc. of IEEE European Solid-State Circuits Conference (ESSCIRC), pp. 248 – 251, Sept. 2007. (Best paper award)
* A. Lombardi, P. Malcovati, A. Basto, E. Bonizzoni, and F. Maloberti, “An optimized two stage low power sinc3 filter for ?? modulators”, Proc. of IEEE Ph.D. Research in Microelectronics and Electronics (PRIME), pp. 81-84, July 2007.
* I. Galdi, E. Bonizzoni, and F. Maloberti, “Design of a current-mode 6-bit 100 MS/s flash A/D converter with 0.75 pJ/conv-lev FoM”, Proc. of IEEE Ph.D. Research in Microelectronics and Electronics (PRIME), pp. 69-72, July 2007.
* A. Lombardi, E. Bonizzoni, P. Malcovati and F. Maloberti, “A low power sinc3 filter for ?? modulators”, Proc. of IEEE International Symposium on Circuit and Systems (ISCAS), pp. 4008-4011, May 2007.
* E. Bonizzoni, F. Borghetti, P. Malcovati, F. Maloberti, and B. Niessen, “A 200mA 93% peak efficiency single-inductor dual-output DC-DC buck converter”, IEEE International Solid-State Circuits Conference (ISSCC) Dig. Tech. Papers, pp. 526-527, Feb. 2007.
* F. Bedeschi, C. Boffino, E. Bonizzoni, C. Resta, G. Torelli, and D. Zella, “Set-sweep programming pulse for phase-change memories”, Proc. of IEEE International Symposium on Circuit and Systems (ISCAS), pp. 967-970, May 2006.
* F. Bedeschi, C. Boffino, E. Bonizzoni, O. Khouri, G. Pollaccia, C. Resta, and G. Torelli, “A low-ripple voltage tripler”, Proc. of IEEE International Symposium on Circuit and Systems (ISCAS), pp. 2753-2756, May 2006.
* F. Bedeschi, E. Bonizzoni, G. Casagrande, R. Gastaldi, C. Resta, G. Torelli, and D. Zella, “SET and RESET pulse characterization in BJT-selected phase-change memories”, Proc. of IEEE International Symposium on Circuit and Systems (ISCAS), pp. 1270-1273, May 2005.
* R. Arona, E. Bonizzoni, F. Maloberti, and G. Torelli, “Heap charge pump optimisation by a tapered architecture”, Proc. of IEEE International Symposium on Circuit and Systems (ISCAS), pp. 1903-1906, May 2005.
* F. Bedeschi, C. Boffino, E. Bonizzoni, O. Khouri, C. Resta, and G. Torelli, “Fast-recovery CMOS voltage regulator for large capacitive loads”, Proc. of IEEE International Conference on Signal and Electronic Systems (ICSES), pp. 349-352, Sep. 2004.
* F. Bedeschi, C. Boffino, E. Bonizzoni, O. Khouri, C. Resta, and G. Torelli, “Bit-line biasing technique for phase-change memories”, Proc. of IEEE International Conference on Signal and Electronic Systems (ICSES), pp. 229-232, Sep. 2004.
* F. Bedeschi, R. Bez, C. Boffino, E. Bonizzoni, E. Buda, G. Casagrande, L. Costa, M. Ferraro, R.Gastaldi, O. Khouri, F. Ottogalli, F. Pellizzer, A. Pirovano, C. Resta, G. Torelli, and M. Tosi, “4 Mbit MOSFET-selected phase-change memory experimental chip”, Proc. of IEEE European Solid-State Circuits Conference (ESSCIRC), pp. 207-210, Sep. 2004.
* F. Bedeschi, E. Bonizzoni, A. Fantini, C. Resta, and G. Torelli, “A low-power low-voltage MOSFET-only voltage reference”, Proc. of IEEE International Symposium on Circuit and Systems (ISCAS), vol. 1, pp. 57-60, May 2004.
* F. Bedeschi, E. Bonizzoni, O. Khouri, C. Resta, and G. Torelli, “A fully symmetrical sense amplifier for non-volatile memories”, Proc. of IEEE International Symposium on Circuit and Systems (ISCAS), vol. 2, pp. 625-628, May 2004.
* E. Bonizzoni, A. Cabrini, O. Khouri, G. Torelli, “Algorithm for Automatic Design of Maximum-Efficiency Dickson Charge Pumps”, Proc. of IEEE European Conference on Circuits and Theory Design (ECCTD, vol. 2, pp.373-376, Sept. 2003.

 

 

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